The present invention relates to digital to analog converters, in general, and to pulse density modulation (PDM) digital to analog converters, in particular.
As part of the ever present drive to reduce the post, size and power consumption of electronic devices, smaller and simpler components are being used in the design of these devices. Some of these components are driven by analog control signals and require a stable, high-resolution analog control signal in order to work efficiently. The analog control signals are typically produced by digital to analog converters (DACs). In portable cellular telephones, for example, analog control signals are used to determine the working point of a transmission Automatic Gain Control (AGC), which controls the power of an amplifier of a transmitting device. Analog control signals are also used to determine the working point of a voltage-controlled temperature-compensated oscillator (VCTCXO), which is used to modulate the transmitted signal and to demodulate the received signal.
Conventional DACs use various circuits that are known in the art, for example, resistor ladders. Analog circuits such as resistor ladders require a large silicon area when implemented into an integrated complementary metal oxide semiconductor (CMOS) circuit, a factor which becomes much more significant from a rest perspective when small sub-micron CMOS technology is used.
Digital to analog converters (DAC) based on pulse width modulation (PWM) or pulse density modulation (PDM) methods are known in the art. The PDM method is described in U.S. Pat. No. 5,337,338 to Sutton et al. A pulse modulated DAC comprises a digital circuit which converts a multi-bit digital signal to a single bit digital signal, followed by an analog low pass filter (LPF) which converts the single hit digital signal to a constant level analog signal. The LPF filters out the undesired high frequencies in the single bit digital signal. A simple and economical way to implement a low pass filter is by using one resistor and one capacitor.
The purpose of the analog LPF is to produce a stable analog signal output that is the average of the discrete levels of the single bit digital signal input. One of the disadvantages of the PWM and PDM methods is that the analog signal output is not constant, but rather has an inherent harmonic ripple in it due to the charging and discharging of the capacitor. This ripple adversely affects the analog components controlled by the analog signal output. For example, a ripple imposed onto an AGC modulates the carrier frequency and generates undesired spurious transmission signals. A ripple imposed onto a VCTCXO will generate spurious replicas of the desired transmission signal at multiples of the ripple frequency, and will interfere with the desired received signal. Another disadvantage is that when the pulse modulated signal changes to represent a different multi-bit digital signal, a relatively long response time is required until the LPF output reaches the new desired value. These two disadvantages are related: trying to reduce the ripple by decreasing the cutoff frequency results in a slower response time.
Various digital to analog converters, using PWM or PDM methods, are described in the U.S. Pat. No. 5,774,084 to Brombaugh et al., U.S. Pat. No 5,764,165 to Buch, U.S. Pat. No. 5,712,636 to Buch, and U.S. Pat. No. 5,784,019 to Wong et al. U.S. Pat. No. 5,617,060 to Wilson et al. describes an automatic gain control (AGC) and DC offset correction method and apparatus that uses PDM and a conventional low pass filter. U.S. Pat. No. 5,204,594 to Carbolante discloses a circuit for providing a signal proportional to the average current flowing through coils of a motor operated in both linear and PWM modes.